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This module focuses on a question of high interest to many HPC users: what changes might I need to make to my program, or even to my algorithm, so my application can make good use of many-core processors such as the Intel Xeon Phi on Stampede? To answer this, we consider just the main characteristics of Intel’s Many Integrated Core (MIC) architecture, along with their implications for how a MIC-enabled code should be put together.

Compared to the companion modules on MIC and vectorization that also form part of the Virtual Workshop, this module passes relatively lightly over technical details in order to put more emphasis on the application side. We use a detailed case study to provide motivation for, and to give examples of, the types of code transformations that are needed to take the best advantage of MIC.

Steve Lantz
Center for Advanced Computing
Cornell University

April 2016